Re: Dual-core G5 sysctl

• Subject: Re: Dual-core G5 sysctl
• From: Ian Ollmann <email@hidden>
• Date: Tue, 29 Nov 2005 13:46:10 -0800
• Delivered-to: email@hidden
• Delivered-to: email@hidden

On Nov 29, 2005, at 1:43 PM, Steven G. Parker wrote:

On Nov 29, 2005, at 2:41 PM, Ian Ollmann wrote:

On Nov 29, 2005, at 1:35 PM, Jeff Szuhay wrote:

On Nov 29, 2005, at 4:07 PM, Ian Ollmann wrote:

As a general rule, it is almost always possible to get better performance by restricting memory bus access, even on uniprocessor machines. ;-)

Okay, this one piques my curiosity.

Generally, how does one do that: restricting memory bus access?

Maybe I'm not thinking about this right, but it seems this is more to do with a specific
compiler.

There are a number of techniques like strip mining to use the front side bus less and the caches more.

And processor affinity :)

Touché

Ian _______________________________________________
Do not post admin requests to the list. They will be ignored.
PerfOptimization-dev mailing list      (email@hidden)
Help/Unsubscribe/Update your Subscription:
http://lists.apple.com/mailman/options/perfoptimization-dev/email@hidden

• Prev by Date: Re: Dual-core G5 sysctl
• Next by Date: Re: Dual-core G5 sysctl
• Previous by thread: Re: Dual-core G5 sysctl
• Next by thread: Re: Dual-core G5 sysctl
• Index(es):
  • Date
  • Thread