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This branch instruction acquires the current instruction address. The Mach-O binary format requires this instruction (plus several others) to access a global variable or to branch to a function in a shared library. Be sure that code that is not part of a shared library is compiled with the -mdynamic-no-pic optimization flag (with gcc) for better performance. Use local variables to shadow global variables to avoid global accesses and to allow the compiler to make better variable aliasing optimizations.
postgreSQL does make any shared libraries (all .a or .so). So, I tried -mdynamic-no-pic and got this link error:
ld: ascii_and_mic.o has local relocation entries in non-writable section (__TEXT,__text)
What should I be looking for in the source code that might have caused this?
I've been looking at a lot of assembly (the joys of Shark). Now the last time I really did anything in assembly was back on an 8088. Needless to say, things have really changed.
In their "lightweight lock manager" which provides mutual exclusion of access to shared-memory data structures. They offer both exclusive and shared lock modes (to support read/write and read-only access to a shared object).
I find a sync call before two hot spots (with -O2, so things are out of order to prevent LSU rejects:
1.8% 0x11c22c sync 35:35 lwlock.c:325
51.2% 0x11c230 addis r10,r31,17 2:1 lwlock.c:329
0x11c234 li r0,0 2:1 lwlock.c:325
0x11c238 cmpwi cr7,r27,0 3:1 lwlock.c:334
0x11c23c addis r2,r31,17 2:1 lwlock.c:329
324 /* We are done updating shared state of the lock itself. */
1.8% 325 SpinLockRelease_NoHoldoff(&lock->mutex);
326
327 /* Add lock to list of locks held by this backend */
328 Assert(num_held_lwlocks < MAX_SIMUL_LWLOCKS);
51.6% 329 held_lwlocks[num_held_lwlocks++] = lockid;
the sync waits until every thing is cleared (my simple def), so it waits for a full 35 cycles! I read that this probably isn't needed for most chips.
SpinLockRelease and friend (and all the SpinLock stuff is machine_independent locks):
#define SpinLockAcquire_NoHoldoff(lock) S_LOCK(lock)
#define SpinLockRelease(lock) \
do { \
S_UNLOCK(lock); \
RESUME_INTERRUPTS(); \
} while (0)
Here is what (I think) their hardware version is:
#if defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__)
/*
* PowerPC S_UNLOCK is almost standard but requires a "sync" instruction.
*/
#define S_UNLOCK(lock) \
do \
{\
__asm__ __volatile__ (" sync \n"); \
*((volatile slock_t *) (lock)) = 0; \
} while (0)
#endif /* powerpc */
Basically, most of the time is spent around SpinLockRelease_NoHoldoff!
Is a sync really required?
Thanks
Marc
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