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Re: Atomic operations & SMP

On Tue, 2004-01-27 at 17:59, Glenn Anderson wrote:
> >To be sure, even changing an integer global can be a problem where
> >one processor won't know about the changes by the other?
>
> If you want to be able to do something like write to a global and
> have one or more threads read from it (a simple boolean flag for
> example), you should be fine as long as you declare the global as
> volatile. There are cache coherency protocols between the PowerPC
> processors on SMP machines to make sure the other processor(s) notice
> the change.

Beware that storage is massively out of order on POWER4 / G5

Don't rely on writes beeing seen in the same order as they were issued
by the "other" CPU without using explicit memory barriers.

You can do real atomic operations using the lwarx/stwcx (or their
64 bits counterpart), but those too need some careful thinking if
used for things like implementing spinlocks, to avoid having a read or
a write "leak" out of the critical section. I don't recommend using
them directly.

OS 9 used to provide some atomic ops via DriverServiceLib, I
don't know if OS X still does.

Ben.
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