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Re: [Apple16X50Serial] How to prevent HW buffer overflows?

Thanks for the fast answer.

You don't say what speed you're running your link at, so I can't
guesstimate
how long the interrupt has to be held off before you lose data.

115200 baud


The Apple16x50 driver sources available on the OpenDarwin cvsweb don't show any signs of installing an interrupt filter, so you are the mercy of the scheduling of its interrupt thread when it comes to latency. In the face of other interrupts or kernel threads, you may be looking at tens or hundreds of milliseconds worth of latency.

You mean Apple16X50UARTSync is too slow, or? Can we adjust the priority of the interrupt handler as client of Apple16X50UARTSync?


you need an interrupt filter so that you can run *immediately* the UART
> signals the FIFO is filling.

Does this mean we have to rewrite the complete Apple16X50UARTSync or is possible to add this "feature" easily to Apple16X50UARTSync. We are quite new at the interupt level.

Soory but we did not get the path to proceed to fix this.
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References: 
 >[Apple16X50Serial] How to prevent HW buffer overflows? (From: Alexander Traud <email@hidden>)
 >Re: [Apple16X50Serial] How to prevent HW buffer overflows? (From: drivers <email@hidden>)



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