You can sometimes use light-weight sync 1 "lwsync" on G5-MP's, which
allows loads to happen speculatively across the barrier **, but you
probably need to leave the full sync instruction in there for
G4-MP's... that's why the instruction exists: to ensure that
modifications to a shared data structure (memory) is forced to a
known state with respect to all other processors and concerned
mechanisms in the system.
Crap. Is there a way with defines to do this; i.e., tell a G5 (power4
> models) from lesser powerpcs?
If you posted the entire code to your lock functions (ie what you need
to do in the middle), maybe we could recommend something?
BTW, the commpage ...
What is this?
The commpage is in the first 0x1000 of an application's address space,
and contains a jump table to many common functions such as simple
locks, bzero, memcpy, etc. At startup, Mac OS X sets these pointers to
optimized functions for the particular hardware config. Common library
functions and macros are usually built upon these primitives.
--
Shaun Wexler
MacFOH http://www.macfoh.com
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