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Re: Address arithmetic in Altivec?



On Wed, 27 Oct 2004, Gohara, David  wrote:

> Is it possible to use Altivec to perform address addition and/or
> multiplication.
>
Address arithmetic is like any other integer arithmetic. There are three
issues that reduce efficiency, though:

1. The widest integer that AltiVec can handle is 32 bits. But addresses
   could be 64 bits wide on a G5, at least with a future OS release. So
   you would want compute 32 bit wide offsets rather than full 64 bit wide
   addresses on that platform. (Later loads and stores using the offset
   can add the 64 bit base address 'for free'.)

2. There is no hardware support for scattered loads or stores of vector
   elements.

3. AltiVec has no wide multiply; it has to be synthesized from several
   16bit * 16bit = 32 bit narrow multiplies.

So in practice what you might want to do is to partially vectorize the
code inquestion. You'd vectorize what you can before the scatter/gather
operation, then you vectorize the address calculation and fill a small
array with computed addresses (and data as well, in case of a scattering
store). Now you have to fall back to scalar code doing the scattered
memory accesses (and placing the loaded data into some contiguous array,
in case of a gathering load). Then you can use vector code again for
further processing.

The intermediate buffer for addresses and data should not so large as to
pollute too much of the cache. And the vectorized part of the algorithm
should be big enough to outweigh the performance lost with copying data.

  Holger
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References: 
 >Address arithmetic in Altivec? (From: "Gohara, David " <email@hidden>)



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