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Re: loop unrolling and AltiVec register utilization



On Fri, 29 Oct 2004, Stan Jou wrote:

> When I look into the assembly in Shark,
> The unrolled part is full of stalls.
> I suspect one of the reason of stalls is
> the vector register 'congestion'.
> The assembly repeatedly uses v0, v1, v10, v11, v12, v13
> and there are other 11 vector registers occupied by
> an outer loop pt0~pta (44 dimensions, 11 vector registers).
> Since there are 32 vector registers in a G4,
> there are about 32-(11+6) = 15 idle vector registers,
> which could have been used in the computation to reduce stalls.

Looks like a case of bad scheduling by the compiler. It might help to
write the unrolled loop body like this:

  load item 0;
  load item 1;
  load item 2;
  load item 3;

  first operation on item 0;
  first operation on item 1;
  first operation on item 2;
  first operation on item 3;

  second operation on item 0;
  second operation on item 1;
  second operation on item 2;
  second operation on item 3;

  ...

  store item 0;
  store item 1;
  store item 2;
  store item 3;

This should reduce the stalls quite a bit, because a) successive work for
the same execution unit is independent, and b) dependant operations are
spaced further apart in time, hiding the latency of the operations.

(This is not perfect either, but a lot closer to perfection than a
copy/pasted loop body.)

  Holger
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References: 
 >loop unrolling and AltiVec register utilization (From: Stan Jou <email@hidden>)



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