On Tuesday, June 24, 2003, at 07:42 AM, Peter Klaver wrote:
Hi Steve,
--- If you're doing 64-bit FLOATING POINT number crunching, you won't
get any architectural benefit. (you'll get the benefit of faster
clock speeds, but nothing else will have changed).
--- I don't understand why you say "On current G4s, each 64 bit
calculation has to be 'split up' into two calculations.". The G4
(and all its predecessors since the 68040) have been able to do
64-bit (IEEE double precision floating point) calculations without
splitting them up. All the floating-point CPU registers have been
64-bits all along.
--- The 64 bits applies to:
1... the main registers (which are now 32 bits)
2... integer arithmetic (2^31 * 4 will no longer overflow)
3... the address and data paths.
--- So it will be able to address more memory (bigger address
registers) and do larger integer calculations and move data around in
larger chunks, but I haven't seen anything about changed floating
point performance (other than clock speeds).
Thanks for the info. I always thought that, the G4 being a 32 bit
processor, 64 bit calculations involved doing it in two parts. But
from your comment about the fpu registers being 64 bit all along, I
was wrong it seems.
One question remaining: the fpu execution core, is that also 64 bit?
If not, then I don't understand how the fpu would handle a 64 bit of
data even if the registers are 64 bit.
--- Yes, the whole FPU (registers and arithmetic unit ) is 64 bits
wide, and has been in every PowerPC chip since 1939 ;->
----------------------------------------------------------------
Steve Bird
Culverson Software - Elegant software that is a pleasure to use.
www.Culverson.com (toll free) 1-877-676-8175
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