site_archiver@lists.apple.com Delivered-To: darwin-kernel@lists.apple.com Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:date:from:to :subject:cc:in-reply-to:mime-version:content-type :content-transfer-encoding:content-disposition:references; bh=ojhDQCOa+sgKmkAqNkqbJM3IobujKE8vKxQACkIgpIY=; b=CoqCttkukhLBGfRiK2p+AqND9Z9bzV4GaAP739d+Ahw7TR1zuuuCgYW7L+b6ZNCk92 dxvtT9QFv7p2EX1SMJztuRwAyN5VSxem7e576lZHa4GGcTiWbngf7jSa8GHvmiCv37Ut qYKRYHz14dF8roqStO9bexsY7RxgCpMLlpmCM= Domainkey-signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:to:subject:cc:in-reply-to:mime-version :content-type:content-transfer-encoding:content-disposition :references; b=p/3oCw7YNrgHIHbKhXpLQBZJRB5mXdzElAms8u62ResSF9dHIQ3hiDkWKX3HEJb5tU DrViKuiPoOlpxTIa6ldD4ZnrvO4AD2OAyq+gGJ+i+BZrSHMhuIqjA1jCe36w+UmNlatH +tyAFw07LIEKWWcdo4JcUpxY0tPkztyxXJ92k= hi Rob, I answered you on this part (it sounds like you are porting existing code, or try to apply foreign concepts to macos)

(The context of this query is trying to serialise access to registers (including register reads) on a PCI device.

i will recommend to read this document carefully http://developer.apple.com/documentation/DeviceDrivers/Conceptual/WritingDev... Cheers! On Sun, Nov 16, 2008 at 10:28 PM, Rob Cas <sacbor@gmail.com> wrote:

Hi,

I'm trying to understand how IOSimpleLockLockDisableInterrupt works to prevent interrupt preemption in a multi-processor environment. Perhaps somebody could help clarify my (mis)understandings.

IOSimpleLockLockDisableInterrupt() appears to disable interrupts (via ml_set_interrupts_enabled()) using the sti/cli instructions which act only on a single CPU.

Does this mean that if such a lock is held by a task on the same workloop as an IOFilterInterruptEventSource, it is still possible for an interrupt filter function to be called via an interrupt occurring on a different CPU?

Looking at how interrupts are delivered/controlled inside IOKit via IOInterruptControllers/IOSharedInterruptControllers, IOFilterInterruptEventSource, etc it looks like there is just a single 'master' interrupt controller (AppleACPICPUInterruptController) attached to just one of the CPUs that (ultimately) causes interrupts to be dispatched to the filter functions of IOFilterInterruptEventSources. Are interrupts from all CPUs somehow routed through to this single master interrupt controller?

(The context of this query is trying to serialise access to registers (including register reads) on a PCI device.

An alternative approach that occurs to me (if IOSimpleLockLockDisableInterrupt is not suitable) is to disable the IOFilterInterruptEventSource temporarily whilst the registers are accessed outside of the interrupt filter function, which has the side-effect of calling disableInterrupt() on the shared interrupt controller, thus preventing preemption by the interrupt filter function. I'm not sure whether disabling a shared interrupt controller for very brief times is a good idea though - will it have an adverse impact on other parts of the system sharing those interrupts. )

Thanks in advance, Rob. _______________________________________________ Do not post admin requests to the list. They will be ignored. Darwin-kernel mailing list (Darwin-kernel@lists.apple.com) Help/Unsubscribe/Update your Subscription: http://lists.apple.com/mailman/options/darwin-kernel/openspecies%40gmail.com

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