Re: MTRRs and PATs
Re: MTRRs and PATs
- Subject: Re: MTRRs and PATs
- From: Derek Kumar <email@hidden>
- Date: Tue, 20 Nov 2007 18:17:04 -0500
Victor,
I presume this is for debugging purposes? You can use the reggie_se
tool from the CHUD toolkit to display the contents of various MSRs by
number.
For example, on a Mac Pro running Leopard:
This is the MTRR capabilities MSR (0xFE):
reggie_se -r -a 0xfe -B 64
reggie_se 4.5.0
CPU0 - 3000MHz Intel Xeon 53XX
Address 0x000000fe 0x0000000000000508 |0 0 0 0|0 0 0 0|0 0 0 0|
0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0 0|0 0 0
0|0 0 0 0|0 1 0 1|0 0 0 0|1 0 0 0|
i.e. there are 8 variable ranges, WC and fixed range registers are
supported
The contents of IA32_CR_PAT (0x277):
bash-3.2# reggie_se -r -a 0x277 -B 64
reggie_se 4.5.0
CPU0 - 3000MHz Intel Xeon 53XX
Address 0x00000277 0x0001040600070406 |0 0 0 0|0 0 0 0|0 0 0 0|
0 0 0 1|0 0 0 0|0 1 0 0|0 0 0 0|0 1 1 0|0 0 0 0|0 0 0 0|0 0 0 0|0 1 1
1|0 0 0 0|0 1 0 0|0 0 0 0|0 1 1 0|
i.e. the PA6 field (which is what the kernel's MMU management (pmap)
layer selects when asked to mark mappings WC) is set to write combine.
In general, the PAT and page table based mechanisms are used
preferentially by the kernel's pmap layer (and indirectly by the IOKit
APIs).
This is a dump of the kernel's internal MTRR state structure (obtained
via the live kernel debugger). The var_range field is an array
containing base and mask values (specifying base, cache attribute type
and range) that can be introspected.
(gdb) p mtrr_state
$5 = {
MTRRcap = 0x508,
MTRRdefType = 0xc00,
var_range = 0x6483e00,
var_count = 0x8,
fix_range = {{
types = 0x606060606060606
}, {
types = 0x606060606060606
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}, {
types = 0x0
}}
}
Standard disclaimer: manipulating these MSRs directly can lead to
unpredictable results; they should be altered directly by the kernel
alone. You must, of course, use the provided APIs (such as
IOSetProcessorCacheMode) to set cache attributes.
Derek
On Nov 20, 2007, at 3:34 PM, Victor Vedovato wrote:
Anyone know of a tool for examining x86 MTRR and PAT registers or
displaying memory range cache controls on OS X?
Thanks,
Victor
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