Re: Techniques for thread communication
Re: Techniques for thread communication
- Subject: Re: Techniques for thread communication
- From: "Alastair J.Houghton" <email@hidden>
- Date: Tue, 9 Sep 2003 11:37:07 +0100
On Tuesday, September 9, 2003, at 11:13 am, Peter Robinson wrote:
Chris Purcell <email@hidden> wrote:
Only if intResult is not word-aligned: word-aligned reads and writes
are atomic on PPC and Intel alike.
That's good. AIUI int instance variables will normally be
word-aligned.
But what about the same accessor pattern for the following instance
variables:
@interface SomeClass
{
short alignedShort, unalignedShort;
BOOL alignedBOOL, unalignedBOOL;
}
@end
I'm guessing (and hoping) that even though BOOLs and shorts have
smaller
alignment, the same accessors are still thread safe in some sense.
The PPC PEM says that accesses to 8-bit values are atomic at 8-bit
alignments, 16-bit values at 16-bit alignments and 32-bit values at
32-bit alignments. It makes no guarantees as regards other accesses,
and even notes that double-precision (64-bit) floating point memory
accesses are *not* guaranteed to be atomic on 32-bit implementations
even when accessing 64-bit aligned memory.
You do have to be a bit careful when considering whether a C statement
is atomic because PPC and most other RISCs are load/store (i.e. they
cannot work directly on memory), so for example
intResult++
*isn't* an atomic operation.
Kind regards,
Alastair.
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