Re: Lock-free protocols?
Re: Lock-free protocols?
- Subject: Re: Lock-free protocols?
- From: Stephen Davis <email@hidden>
- Date: Mon, 22 Apr 2002 10:45:55 -0700
It's a little odd b/c of its hardware-centric focus but there's an
interesting paper on this problem at:
http://www.slac.stanford.edu/BFROOT/www/Computing/Online/DataFlowOld/noRMWqs.
htm
Unfortunately, I don't know of any sample code which implements this
scheme. Also, the PowerPC requires some instruction sequence/data
synchronization (isync, sync) primitives whereas the architecture in the
paper does not (In case you don't know, the PowerPC architecture has a
weakly-ordered memory model which means that the chip can pretty much
send writes to memory in any order that it feels like as long as data
dependencies are met. If you want to make sure a memory write or set of
writes gets out to the RAM in the order you expect (important for
synchronization), you need to explicitly add some instructions to make
that happen -- see Chapter 5 of the PowerPC Programming Environments
manual.). The paper's algorithm may not be applicable depending on what
you're doing but you may find it useful. And it's pretty neat. :-)
stephen
On Monday, April 22, 2002, at 01:04 AM, Jeremy Cooper wrote:
I've seen a lot of discussion on this list about the perils of
synchronizing IOProc threads with worker threads using locks. Several
people have mentioned that there are ways to transfer data safely
between
IOProc threads and other lower-priority threads without using locks, yet
no one has actually shown how it is done.
Can someone show some code snippets for 'lock-free' buffer passing?
-J
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