Re: PowerPC optional instructions
Re: PowerPC optional instructions
- Subject: Re: PowerPC optional instructions
- From: Os <email@hidden>
- Date: Wed, 26 May 2004 22:38:25 +0100
OK, for the record, here's what I found (copied from the Motorola pdfs).
The MPC750 implements the following instructions optional to the
PowerPC architecture:
External Control In Word Indexed (eciwx)
External Control Out Word Indexed (ecowx)
Floating Select (fsel)
Floating Reciprocal Estimate Single-Precision (fres)
Floating Reciprocal Square Root Estimate (frsqrte)
Store Floating-Point as Integer Word (stfiwx)
The MPC7400 implements the following instructions optional to the
PowerPC architecture:
External Control In Word Indexed (eciwx)
External Control Out Word Indexed (ecowx)
Data Cache Block Allocate (dcba)
Floating Select (fsel)
Floating Reciprocal Estimate Single-Precision (fres)
Floating Reciprocal Square Root Estimate (frsqrte)
Store Floating-Point as Integer Word (stfiwx)
cheers,
os.
On 26 May 2004, at 21:15, Pavol Markovic wrote:
On 26.5.2004, at 22:10, Os wrote:
If you look into motorola/ibm cpu tech specs you'll find the answer.
If I remember right it's implemented in G3/G4/G5 CPU's.
it's turning 'G3' into a Motorola part number that I always struggle
with. I'm sure there's a chart on the apple site somewhere...
MPC 740/750 and higher for G3, MPC 7400 and higher for G4
My question is, how to use this instruction - asm block in C code?
yup, that was my plan. I'm doing the same with the 'fsel' instruction
which is a real performance winner.
cheers,
os.
email@hidden
http://www.collective.co.uk/
email@hidden
http://www.collective.co.uk/
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