Re: Poor performance of pthreads across cpu dies.
Re: Poor performance of pthreads across cpu dies.
- Subject: Re: Poor performance of pthreads across cpu dies.
- From: Andrew Gallatin <email@hidden>
- Date: Wed, 5 Sep 2007 16:21:07 -0400 (EDT)
Terry Lambert writes:
> On Sep 5, 2007, at 6:26 AM, Andrew Gallatin wrote:
> > Terry Lambert writes:
> >> On Sep 4, 2007, at 6:09 AM, Andrew Gallatin wrote:
> >>> The *NIC* has looked at it, and can easily hash different
> >>> connections
> >>> to several MSI-X interrupt handlers, which are then each bound to
> >>> different CPUs (or groups of CPUs).
> >>
> >> I am told we support this (Message Signalled Interrupts) for the
> >> latest Intel OS releases, and that it is in fact the preferred method
> >> of interrupt delivery these days, for hardware capable of supporting
> >> it. I wasn't able to find the tech note, which is supposed to have
> >> been published already, according to the author, so you might want to
> >> contact DTS.
> >
> > MSI is different from MSI-X. I figured out how to use MSI from the
> > headers / source last winter, but AFAIK, darwin/macosx does not yet
> > support MSI-X, which is required to have multiple interrupt vectors
> > per device which are bound to different CPUs.
>
>
> Like I said, it's probably time to stop speculating, and ask DTS for
> the Tech Note.
I looked at the (tiger) header files.. But a tech note
would be appreciated.
> -
>
> According to the public documentation available to me, the advantages
> of MSI-X over MSI are:
>
> - Support a larger maximum number of vectors per function
>
> - Provide the ability for system software to configure each vector
> with an independent message address and message data,
> specified by a table that resides in Memory Space
>
> - Per-vector masking is an optional extension of MSI but a required
> feature for MSI-X.
>
> From my reading of things, the issue as to whether or not you can
> target multiple CPUs with MSI has more to do with contiguous vs. non-
> contiguous vector assignment (which means that it's not possible in
> older Linux kernels). The MSI-X implementation overcomes this in
> older Linux kernels due to independent configuration of message data
> and address. BUT, if you are willing to perform contiguous
> allocations, it's not a problem for MSI to do the same.
I'm not sure what linux kernels have to do with it. The problem with
multiple messages in MSI is that all messages have the same message
address, but just different message data. Using the same message
address means that all interrupts will be delivered to the same
APIC, and hence to the same CPU. However, maybe this isn't a problem
on darwin/OSX, since all hardware interrupts are delivered to CPU 0
anyway...
Drew
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