Re: Enabling IEEE 754 floating-point exceptions: API?
Re: Enabling IEEE 754 floating-point exceptions: API?
- Subject: Re: Enabling IEEE 754 floating-point exceptions: API?
- From: Peter Andersen <email@hidden>
- Date: Mon, 8 Apr 2002 16:06:14 +0200
In
http://lists.apple.com/mhonarc/unix-porting/msg00225.html I wrote:
>
Does an API for enabling IEEE 754 floating-point exceptions in OSX exists,
>
or will I have to do this by assembly code directly manipulating the PowerPC
>
FPSCR and MSR registers?
>
>
In classic MacOS development under MPW there was an API in <fenv.h>, notably
>
the feraiseexcept() function. I do not know if this is available as part of
>
carbon, but I prefer a direct interface instead of Carbon.
I got no answers, but I guess the answer is no.
I tried doing it myself in assembler as such:
/* See
*
http://developer.apple.com/techpubs/mac/PPCNumerics/PPCNumerics-154.html
* and table 5-17 in PowerPC 601 ref. manual
*/
#define FPU_ZERODIVISION (1L << 27) /* ZE bit */
#define FPU_INVALID (1L << 24) /* VE bit */
#define FPU_OVERFLOW (1L << 25) /* OE bit */
#define FPU_UNDERFLOW (1L << 26) /* UE bit */
#define FPU_PRECISIONLOST (1L << 28) /* XE bit */
static void EnableIEEE754Exceptions(mask)
{
#if 0
register unsigned long msr;
/* Need to set MSR bits too, but mfmsr/mtmsr are supervisor only!*/
/* The stuff below is like get_msr()/set_msr() in <architecture/ppc_basic_regs.h> */
__asm__ __volatile("mfmsr %0" : "=r" (msr));
msr |= (1L<<(31-23)) /*FE1*/| (1L<<(31-20)) /*FE0*/;
__asm__ __volatile("mtmsr %0" : : "r" (msr));
#endif
if (mask & FPU_ZERODIVISION) __asm__ __volatile("mtfsb1 27");
if (mask & FPU_INVALID) __asm__ __volatile("mtfsb1 24");
if (mask & FPU_OVERFLOW) __asm__ __volatile("mtfsb1 25");
if (mask & FPU_UNDERFLOW) __asm__ __volatile("mtfsb1 26");
if (mask & FPU_PRECISIONLOST) __asm__ __volatile("mtfsb1 28");
}
As you can see from the code, i have a problem with the MSR register:
I need to set two bits in this register to enable exceptions (as also
mentioned in the Numerics manual), but the assembler instructions for
doing this are for supervisor mode, and will fail with Illegal
Instruction if I use them.
So my original question now boils down to whether there exists a
system call which allows me to set the exception enable bits in the
MSR register.
I have cross-posted to darwin-kernel and darwin-development in the
hope of an answer.
--
Sincerely,
Peter Andersen,
Mjolner Informatics A/S <email@hidden> and
University of Aarhus, Denmark <email@hidden>
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