Stepping through the code in the kernel, I get a GPF when executing this instruction even though the address it is swapping into is valid.
Is the address (memory destination operand) 16-byte aligned? That’s a requirement for CMPXCHG16B. (CMPXCHG8 doesn’t have an alignment restriction, which means that it can potentially span cachelines; x86 implementations support that, but at the cost of an expensive “bus lock”).
Derek On Mar 6, 2014, at 7:02 AM, Berni McCoy < email@hidden> wrote:
I noticed there is no longer an OSEnqueueAtomic exposed to KEXTs. Is there an equivalent function for use by KEXTs? I tried using an intrinsic implementation I have (using __sync_val_compare_and_swap), but since that implementation
uses a 128-bit header, it requires cmpxchg16b. Stepping through the code in the kernel, I get a GPF when executing this instruction even though the address it is swapping into is valid. I also have an assembler implementation that works in user-mode, but
it has the same issue as the intrinsic implementation when running in the kernel. In searching the kernel source, I saw no use of the cmpxchg16b instruction. Is there some undocumented restriction for this instruction in kernel mode on OS X?
Thanks in advance,
-Berni
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