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Re: Native Device Formats
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Re: Native Device Formats


  • Subject: Re: Native Device Formats
  • From: "Mikael Hakman" <email@hidden>
  • Date: Tue, 10 Jun 2008 14:07:28 +0200
  • Organization: Datakonsulten AB

That was only an example to illustrate how you easily get a sequence of digital values, none of which coming even close to FS when your input signal is at FS. You can make the sequence longer by using sine wave frequency closer to SR/2. However, your comment shows that we (you and me) are talking about the same phenomena, which is good.

The article is interesting but hardly new. You sample a signal that in itself is entirely at FS then you may very well get digital values that all are well under FS. You then scale up the digital signal so that the digital values get up to FS. Then you feed this scaled digital signal into a DAC. This will overflow the DAC because you are feeding it with digital representation of a signal that is well above FS, even if none of the digital values is above FS. When you scaled up your digital signal, you also, conceptually, scaled up your original signal by the same factor. Therefore your original signal, as perceived by the DAC, is now above FS and therefore will be clipped. This is what the article talks about. It also discuses the current mastering habit of using compressors/limiters in order to push the perceived loudness as high as possible. One example of such recording where this has been pushed to the very limit is the Bigger Bang by Rolling Stones - on some tracks the envelope stays at FS all the time. The article then rightfully points out that you cannot use compressors/limiters, however good they may be, without introducing distortion.

Your original problem isn't in ADC/DAC, nor in your DAW, but in your scaling up your digital signal based on minimum/maximum values of digital, sampled values instead of based on minimum/maximum values of your original, un-sampled signal. Using high SR and appropriate headroom will make this problem less pronounced.

It should be possible to write software that analyses a digital signal and computes the maximum values that would be obtained after DAC - a kind of DAC simulator. Then you could use these values as a basis for final scaling so that your final digital signal uses as much of dynamic range as possible but doesn't overflow a real DAC.

/Mikael

On Monday, June 09, 2008 3:45 PM, Dave wrote:


I agree with your statement that that's how it can come over, though in that example so long as the signal persists for sufficient time (more than a millisecond or so since 24-23 = 1kHz) sufficient information will have been gathered to meet the Sampling Theory criteria. However, this actually doesn't affect my point - the precise sub multiple example I used was purely there to make it simple to visualise the process, and it is true in the more general (non-locked) case, too. See, for instance, http://www.tcelectronic.com/media/nielsen_lund_2003_overload.pdf for more details.

    Dave

On Jun 9 2008, Mikael Hakman wrote:

If you start sampling e.g. 23 kHz sine wave with 48 kHz SR at an unfortunate time, you will have a large number of very small positive and negative values slowly increasing. Only after many cycles the sample time will coincide with actual peak or low. If this signal ceases before the sample values reach any significant "height", and you then scale up the digital values (because the signal is so low), then no headroom in the world will help you. Therefore you should attenuate/amplify your signal before ADC in such a way that the actual (not the sampled) peaks and lows are below FS (and some headroom). Then, whether your ADC gets samples exactly at these peaks and lows, or not, will be immaterial. Providing this sampled signal to a DAC will then reproduce the original wave.

On Monday, June 09, 2008 10:56 AM, Dave Malham wrote:


Then, of course, there's the whole hairy question of intersample "digital overs" where a signal re-constructed from a stream of digital words can have positive peaks higher (or negative peaks lower) than the steady state levels the digital words can represent (or the DAC they are sent to can reproduce). If this seems odd, think of a max level sine wave at an odd sub-multiple of the sample rate. Under these circumstances it is possible for the sample points to fall either side of the peaks of the sine wave, rather than on them, so the peak of the sine wave will be implicitly, rather than explicitly, represented and can, in fact, actually be over 0dBFs. This doesn't matter if all you are doing is storing the signal**, but as soon as you do any processing in the time/frequency domain it can pop up and bite you.

   Dave

**It shouldn't really cause you any problems going to analog, so long as the designer has done the proper, professional thing and allowed some headroom in the analog part of the circuit - but that doesn't always happen. :-(

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References: 
 >Native Device Formats (From: email@hidden)
 >Re: Native Device Formats (From: Jeff Moore <email@hidden>)
 >Re: Native Device Formats (From: "Mikael Hakman" <email@hidden>)
 >Re: Native Device Formats (From: Jeff Moore <email@hidden>)
 >Re: Native Device Formats (From: "Mikael Hakman" <email@hidden>)
 >Re: Native Device Formats (From: Brian Willoughby <email@hidden>)
 >Re: Native Device Formats (From: Dave Malham <email@hidden>)
 >Re: Native Device Formats (From: "Mikael Hakman" <email@hidden>)
 >Re: Native Device Formats (From: email@hidden)

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