Re: How long do render callbacks have to execute?
Re: How long do render callbacks have to execute?
- Subject: Re: How long do render callbacks have to execute?
- From: Jean-Daniel Dupas <email@hidden>
- Date: Fri, 19 Aug 2011 12:49:49 +0200
Le 19 août 2011 à 11:30, tahome izwah a écrit :
> No offense, but I think you're confused. I was not claiming that the
> creation of multiple kernels is for processing on multiple cores -
> that was merely an example of why this would make sense, and an
> observation of what was happening with my AU in Logic (and I have
> clarified that in a subsequent message).
>
> SIMD instructions carry out operations in parallel, on a single
> processor. You are confusing "instructions" and "operations" here. A
> single instruction (as in ucode) can cause a processor to perform
> multiple operations (as in multiplication, addition etc) in parallel,
> which is what is happening for SIMD.
From the processor point of view, multiply + add is a single operation. And that's exactly what Bill was talking about.
> Your original statement "a processor cannot carry out any operations in parallel" is plain wrong
Unlike your quote, Bill's one starts with "In general", which means he know there may be exceptions.
> - if you cannot see that I'm sorry but there's nothing more to be said
> about it.
>
> I agree that this is off-topic, but since it could potentially confuse
> other people I decided to respond. If you don't understand my point
> here I can't help you - being wrong isn't the end of the world. I'm
> not being anal about it so I'll happily drop the subject now and let
> others decide who's right or wrong here.
>
> Hope this clears things up
> --th
>
>
> 2011/8/19 Brian Willoughby <email@hidden>:
>>
>> On Aug 19, 2011, at 01:43, tahome izwah wrote:
>>>
>>> 2011/8/19 Brian Willoughby <email@hidden>:
>>>>
>>>> On Aug 18, 2011, at 22:53, tahome izwah wrote:
>>>>>
>>>>> 2011/8/13 Brian Willoughby <email@hidden>:
>>>>>>
>>>>>> In general, a processor cannot carry out any operations in parallel.
>>>>>
>>>>> Not true. That is exactly what SIMD instructions do which are built
>>>>> into all modern CPUs.
>>>>
>>>> SIMD does not carry out multiple operations, it performs the same
>>>> operation
>>>> on multiple data values. Single Instruction Multiple Data. Have you
>>>> actually written any code using SIMD? How familiar are you with how it
>>>> works?
>>>
>>> Very. SIMD instructions carry out the same instruction on multiple
>>> data *in parallel*. This is contrary to your statement that "a
>>> processor cannot carry out any operations in parallel".
>>>
>>> As I see it, what you were saying is at best imprecise, but actually
>>> totally wrong, which is my whole point here.
>>
>>
>> Your point keeps changing. At first you claimed that AUEffectBase kernels
>> were designed to allow processing to be spread across multiple cores. That
>> is simply not true. Now you're trying to quibble as if carrying out one
>> operation on parallel data is the same thing as carrying out multiple
>> operations on multiple cores. So, a processor can carry out a single
>> operation in parallel, but not "operations." In any case, when a single
>> core executes one SIMD operation on 128 bits of data, it's nothing at all in
>> common with multiple cores executing operations in parallel. The code
>> needed to achieve each of these concepts is vastly different. I really
>> don't understand why you're continuing to argue when this has nothing to do
>> with the OP's question or even your original, flawed assertion.
>>
>> B
>>
>>
> _______________________________________________
> Do not post admin requests to the list. They will be ignored.
> Coreaudio-api mailing list (email@hidden)
> Help/Unsubscribe/Update your Subscription:
>
> This email sent to email@hidden
-- Jean-Daniel
_______________________________________________
Do not post admin requests to the list. They will be ignored.
Coreaudio-api mailing list (email@hidden)
Help/Unsubscribe/Update your Subscription:
This email sent to email@hidden